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RTL Design Engineer

Fathom Radiant

Fathom Radiant

Posted on Thursday, February 8, 2024
About us
We are searching for talented individuals who are driven to tackle the most ambitious goal of our time - building the computer hardware that enables the development of safe artificial general intelligence. See more at fathomradiant.co/aboutus
In our people, we above all value kindness, a scout mindset, a focus on improvement, and prioritising to get the right things done. We aim to help build one of the most transformative technologies in the world, with massive social and ethical implications. We think this makes representation even more important, and we are actively striving to have a range of diverse perspectives on our team.
This role
As a RTL Design Engineer, you will participate in the design, architecture, documentation, and implementation of cutting-edge ASICs used to accelerate machine learning computation in data centers. In this role you will build successful world-class complex SoC and IP through precise implantation and perceptive understanding of the fundamentals of computation and design patterns.
This role is open to remote from anywhere in the world, but we have strong preference towards availability in US and / or Central Europe timezones.
This role aims for multiple hires in different seniority levels.

Areas of contribution

  • Architecture exploration and micro-architecture development
  • RTL development using Verilog, System Verilog and HLS
  • Collaboration with verification and emulation teams in test plan development and debug
  • Collaboration with implementation team to close the design on timing and power
  • You will contribute to the design of one or more of the following components of our system:
  • RDMA / MPI Protocol Engine
  • Transport / Forwarding Logic
  • Shared-Memory Switch (min. 3.2Tbps performance)
  • Ethernet Port Logic (Ethernet 802.3bj/ck/df/dj)

Requirements (necessary skills for this role):

  • M.S. or PhD degree in Computer Science, Electrical Engineering, or a related field
  • Demonstrated experience in the RTL implementation of algorithms, arbiters, and clock-domain crossings, preferably using SystemVerilog.
  • Strong communication and documentation skills

Nice-to-haves (we will prioritize candidates that also have these skills):

  • PhD in Electrical Engineering, Computer Science or related field.
  • Experience applying computer architecture principles to solve open-ended problems
  • Experience in hardware/software co-design
  • Experience mapping deep learning workloads to hardware architectures
  • RTL design experience
  • Experience with Python
For all roles, we target market salaries, with an additional benefits package. Our comprehensive benefits include startup equity and medical expenses coverage (including extra coverage for employees with a family). The salary in our offers are determined based on years of experience, living expenses (for remote roles) and our internal salaries.